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Principal Engineer-Design (SoC Integration and RTL/IP)

Microchip TechnologyChandler, AZ

Posted Oct 16, 2026

What you’d do

Lead SoC integration, RTL development, IP design, and FPGA prototyping for the dsPIC microcontroller group, working with architecture, verification, and physical design teams. Full time in Chandler, AZ. Found on the employer's careers page on Oct 20, 2026. Apply through the link.

You’ll need

  • Bachelor's in EE, Electronics, Computer Engineering, CS, Physics, or related
  • 10+ years in ASIC/SoC design, RTL, FPGA, or SoC integration
  • SystemVerilog
  • AMBA AXI/AHB/APB protocols

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