Post-Silicon Validation and Methodology Engineer

What you’d do

Own bring-up, validation, qualification, tuning, and productization of next-generation silicon from first power-on through PVT sign-off. Partner with architecture, build, firmware, and software teams on power management and clocking requirements, and build AI-assisted lab workflows and test infrastructure. Full time in Santa Clara, CA. Found on the employer's careers page on Oct 14, 2026. Apply through the link.

You’ll need

• Silicon bring-up and validation experience
• Post-silicon characterization and PVT sign-off
• Power management and clocking feature requirements
• AI-assisted lab workflow and test automation
• Cross-functional work with firmware and software teams