Hardware ASIC Packaging SI/PI Simulation and Design Lead (Hybrid)

What you’d do

Lead signal and power integrity work for next-generation ASIC packaging, including design rules for ultra-high-speed signaling, substrate SI/PI analysis, and package design through post-layout extraction. Full-time remote role collaborating with layout teams, vendors, and system partners. Found on the employer's careers page on Oct 18, 2026. Apply through the link.

You’ll need

• Bachelor's in Electrical Engineering
• 8+ years signal and power integrity experience (or Master's + 6, PhD + 3)
• Signal and power integrity analysis
• ASIC package design
• Post-layout extraction