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CMOS SerDes or High-speed I/O, Lead Analog IC Design Engineer
CadenceSan Jose, CA
$119,000–221,000/yr
Posted Sep 30, 2026
What you’d do
Design and develop analog and mixed-signal circuits from concept and specification through final verification, ensuring conformance with customer requirements. Full time role in San Jose. Found on the employer's careers page on Oct 18, 2026. Apply through the link.
You’ll need
- 3+ years designing CMOS SerDes or high-speed I/O ICs
- Analog and mixed-signal circuit design
- Circuit verification
Our summary of the listing. The full listing has the details.