Senior Full-Chip RTL Integration Engineer

What you’d do

Lead RTL integration of internal and third-party IPs into complex ASIC/SoC designs, owning top-level connectivity, clocking, reset, address mapping, and power domains. Full time role working with architecture, verification, DFT, and physical design teams on integration and design closure. Found on the employer's careers page on Oct 7, 2026. Apply through the link.

You’ll need

• RTL integration of ASIC/SoC designs
• SystemVerilog/UVM verification
• Lint, CDC, RDC, synthesis checks
• DFT structures (scan, MBIST, LBIST, JTAG)
• Scripting and automation skills