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DV Intern

EtchedSan Jose, CA

Posted Feb 7, 2026

What you’d do

The intern will verify custom IPs like systolic arrays and DMA engines to ensure they are robust and high-performance. They will work with architects and designers to validate hardware-software stack correctness and performance during Spring or Summer 2027. Found on the employer's careers page on Oct 22, 2026. Apply through the link.

You’ll need

  • Pursuing Bachelor's, Master's, or PhD in electrical or computer engineering
  • Familiarity with high-speed digital logic
  • Exposure to ASIC or SoC design concepts
  • Familiarity with SystemVerilog, UVM, or Python
  • Familiarity with verification and test bench writing

Our summary of the listing. The full listing has the details.

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