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Senior Mask Design Engineer – Hardware

NVIDIASanta Clara, CA

Posted Sep 15, 2026

What you’d do

Perform physical layout for silicon interposers using Cadence tools and verify designs against rules and netlists. Collaborate with package and signal integrity engineers on package solutions, including feasibility studies and layout trade-offs. Full time. Found on the employer's careers page on Sep 29, 2026. Apply through the link.

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