Sr. Physical Design Engineer, Annapurna Labs

What you’d do

Drive physical implementation of IO and core subsystems through synthesis, floor planning, place and route, timing closure, IR drop analysis, and sign-off, working with RTL and architecture teams. Full-time role in Austin, Texas. Found on the employer's careers page on Oct 9, 2026. Apply through the link.

You’ll need

• Bachelor's in Computer Science, Computer Engineering, or Electrical Engineering
• BS + 8 years or MS + 6 years in EE/CS
• 6+ years in ASIC physical design RTL-to-GDSII
• Experience with 7nm, 14/16nm, 20nm, or 28nm nodes
• Scripting in Python, Perl, Bash, or PowerShell