ASIC STA Technical Lead

What you’d do

Lead ASIC DFT STA work in Cisco's Silicon One organization, developing and verifying timing constraints and driving DFT and quality through implementation and post-silicon validation. Full time in San Jose, California. Found on the employer's careers page on Oct 19, 2026. Apply through the link.

You’ll need

• Bachelor's + 8 years, or Master's + 6, or PhD + 3
• RTL design experience
• CDC/RDC and conformal verification
• SDC development
• Timing constraint development and verification