EngineeringOn site
Lead Product Engineer
CadenceSan Jose, CA
$119,000–221,000/yr
Posted Oct 21, 2026
What you’d do
Perform full-chip and block-level physical design from RTL to signoff including place-and-route, timing closure, and power optimization. Develop automation scripts and apply low-power techniques in a full-time role in San Jose. Found on the employer's careers page on Oct 21, 2026. Apply through the link.
You’ll need
- Experience with full-chip and block-level physical design
- Knowledge of timing closure and low-power techniques
- Scripting skills in Python, Tcl, Perl, or Shell
- Familiarity with implementation and signoff tools
- Full time schedule
Our summary of the listing. The full listing has the details.