MLA Design Verification Engineer I, Annapurna Labs

What you’d do

Verify and validate hardware and software solutions, develop and execute verification plans, and track progress toward customer metrics. Full-time role in Cupertino, California. Found on the employer's careers page on Oct 16, 2026. Apply through the link.

You’ll need

• Bachelor's or above in Electrical Engineering, Computer Engineering, or related
• 1+ years of design verification experience using System Verilog and UVM
• 1+ years of testbench development including stimulus, checkers, assertions and coverage