Sr. Full Chip Physical Verification Engineer (Silicon Engineering)

What you’d do

Own full-chip physical verification for advanced-node SoCs, running DRC, LVS, ESD, PERC and antenna signoff in Calibre, ICV or Pegasus, and developing and optimizing verification flows through tapeout. Extended hours and weekends may be needed for critical milestones. Found on the employer's careers page on Sep 27, 2026. Apply through the link.