ASIC Packaging Signal/Power Integrity Hardware Engineer (Hybrid)

What you’d do

Develop and verify ASIC packaging focusing on signal and power integrity for Cisco platforms. Collaborate with teams to design high-speed signaling and power solutions, analyze substrate integrity, and document design rules. Full-time role in San Jose. Found on the employer's careers page on Oct 22, 2026. Apply through the link.

You’ll need

• Bachelor's degree in Electrical Engineering or higher
• 4+ years signal and power integrity experience (Bachelor's)
• 2+ years signal and power integrity experience (Master's)
• PhD in Electrical Engineering with related experience
• Full-time schedule