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IC RTL2GDS Architect, AE

CadenceSan Jose, CA

$162,400–301,600/yr

Posted Oct 7, 2026

What you’d do

Lead technical engagements with customers on digital implementation and signoff, guiding adoption of Cadence tools and AgenticAI features at 3nm and below. Includes benchmarks, flow optimization, and collaboration with R&D on tool enhancements. Full time. Found on the employer's careers page on Oct 18, 2026. Apply through the link.

You’ll need

  • 15+ years in IC design implementation and signoff
  • BS/MS in Electrical Engineering, Computer Engineering, or related
  • Advanced node implementation (3nm and below)
  • Digital design fundamentals
  • EDA tool ecosystems

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