Sr. ASIC DFT Engineer (Silicon)

What you’d do

Develop and optimize DFT architectures for next-generation ASICs used in Starlink satellites and ground infrastructure, including scan insertion, memory BIST, ATPG, and gate-level simulation. May require extended hours and weekends to meet critical milestones. Found on the employer's careers page on Sep 27, 2026. Apply through the link.