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Advanced DV Engineer Intern

Astera LabsSan Jose, CA

$35–55/hr plus $500/week housing stipend

Posted Sep 8, 2026

What you’d do

Intern will develop and maintain verification tests and environments for ASIC and system designs, analyze coverage, debug failures, and apply simulation and formal methods. The role involves owning a scoped project with guidance from engineers. Found on the employer's careers page on Oct 21, 2026. Apply through the link.

You’ll need

  • Enrollment in electrical engineering, computer engineering, computer science, or related program
  • Experience in digital logic, computer architecture, ASIC/FPGA design, or verification
  • Ability to develop SystemVerilog and UVM testbench components
  • Internship or project experience in hardware/software integration

Our summary of the listing. The full listing has the details.

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