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ASIC Packaging Signal/Power Integrity Hardware Engineer (Hybrid)

CiscoSan Jose, CA

$155,000–222,600/yr

Posted Oct 8, 2026

What you’d do

Develop, document, and verify ASIC package designs for high-speed signaling, analyzing substrate signal and power integrity and collaborating with layout teams and vendors. Full time hybrid role in San Jose. Found on the employer's careers page on Oct 18, 2026. Apply through the link.

You’ll need

  • Bachelor's in Electrical Engineering
  • 4+ years signal and power integrity experience (or Master's + 2, or PhD)
  • Signal and power integrity analysis
  • ASIC package design
  • Post-layout extraction

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