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Principal ASIC Design Engineer - Chip Lead
Jariet Technologies, Inc., a subsidiary of CesiumAstroAliso Viejo, CA
Posted Oct 2, 2026
What you’d do
Lead ASIC design engineer role involving full IC/ASIC development from concept to silicon production. Requires advanced front-end design skills and collaboration with backend teams. Full-time position in Aliso Viejo, CA. Found on the employer's careers page on Oct 23, 2026. Apply through the link.
You’ll need
- Master’s in Engineering
- 10+ years of experience
- Experience with IC/ASIC development flow
- Advanced front-end design flow skills
- U.S. citizenship or equivalent status
Our summary of the listing. The full listing has the details.