ASIC Physical Design and Timing Engineer - New College Grad 2026

What you’d do

New college grad role driving physical design and timing analysis and closure for GPUs, CPUs, DPUs and SoCs at block, cluster, or full chip level. Involves synthesis, equivalence checking, floor-planning, timing constraints, timing and power convergence, and ECO implementation. Full time. Found on the employer's careers page on Sep 29, 2026. Apply through the link.