EngineeringOn site
UVM Digital Verification Engineer
DraperCambridge, MA
$75,000–156,000/yr
Posted Oct 14, 2026
What you’d do
Verification engineer on Draper's Digital Design Team, applying UVM-based verification strategies to complex digital and mixed-signal FPGA and ASIC designs in embedded security, cryptography, signal and image processing, navigation and communications. Full time in Cambridge, MA. Found on the employer's careers page on Oct 17, 2026. Apply through the link.
You’ll need
- UVM verification experience
- FPGA and ASIC verification
- Integrated circuit design proficiency
- Understanding of semiconductors and computer architecture
- Ability to write detailed design specifications
Our summary of the listing. The full listing has the details.