Sr. ASIC Design Engineer, Cloud-Scale Machine Learning Acceleration team - Annapurna Labs

What you’d do

Design and deliver high-performance, power-efficient RTL for cloud-scale machine learning ASICs, integrating subsystems into top-level SoCs and running synthesis, timing, lint, and clock domain crossing checks. Full-time role in Cupertino, California, working with architects, verification, and back-end teams. Found on the employer's careers page on Sep 30, 2026. Apply through the link.