EngineeringOn site
Senior Memory Post Silicon Qualification Engineer
NVIDIASanta Clara, CA
Posted Oct 1, 2026
What you’d do
Bring up high-speed memory interfaces (GDDR, LPDDR, HBM) on GPU, CPU and SoC silicon from first power-on through PVT characterization and productization. Own functional validation, IO tuning, timing margin analysis, and multi-vendor DRAM qualification, and lead root-cause closure on complex memory failures. Full time. Found on the employer's careers page on Oct 2, 2026. Apply through the link.
You’ll need
- High-speed memory interface bring-up (GDDR, LPDDR, HBM)
- Post-silicon validation and PVT characterization
- IO tuning and timing margin analysis
- Multi-vendor DRAM qualification
- Root-cause analysis across silicon, PHY, package, board SI/PI, firmware
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