Design Verification Intern, BS - Summer 2027

What you’d do

Internship to work on design verification for ASIC and SOC designs using UVM methodology, collaborating with cross-functional teams on technologies for cloud, AI, storage, and networking. Requires enrollment in a related bachelor's program. Found on the employer's careers page on Oct 21, 2026. Apply through the link.

You’ll need

• Currently enrolled in Bachelor's in Electrical Engineering or Computer Engineering
• Expected graduation Fall 2027 – Summer 2028
• Experience or coursework in design verification or ASIC design
• Familiarity with UVM methodology
• Ability to collaborate with cross-functional teams