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Director - STA

NXP SemiconductorsAustin, TX

Posted Sep 25, 2026

What you’d do

Leads timing analysis for MPU SoCs, including developing and verifying STA constraints and closing timing at subsystem and SoC level. Works with a global design team on physical design, floorplanning, and place and route. Full time in Austin. Found on the employer's careers page on Oct 21, 2026. Apply through the link.

You’ll need

  • BS or MS in Electrical or Computer Engineering
  • 15+ years of physical design experience for complex SoCs
  • 3+ years in STA lead roles
  • STA constraint development and verification
  • Verilog and SoC architecture knowledge

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