Sr. ASIC Design Verification Engineer (Silicon Engineering)

What you’d do

Verify digital ASICs at block and system level for Starlink chips, writing test plans, building test harnesses and sequences, running regressions, and closing code and functional coverage. Includes pre-silicon verification, chip bring-up, and post-silicon validation; extended hours and weekends may be needed. Found on the employer's careers page on Sep 27, 2026. Apply through the link.