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Senior Signal and Power Integrity Engineer - Hardware
NVIDIASanta Clara, CA
Posted Oct 6, 2026
What you’d do
Model and simulate signal and power integrity for high-speed interfaces like NVLink 200Gbs+, USB-4, PCIe5, GDDR6 and LP5X. Create and review substrate and board layout SI guidelines, and automate simulation and data analysis. Full time in Santa Clara, CA. Found on the employer's careers page on Oct 6, 2026. Apply through the link.
You’ll need
- Signal integrity simulation experience
- 3D EM modeling tools
- High-speed interface experience (PCIe, USB, GDDR)
- MATLAB or JMP
- Board and package layout knowledge
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