EngineeringOn site
ASIC Design Verification Technical Leader
CiscoCarlsbad, CA
$166,300–238,300/yr
Posted Sep 30, 2026
What you’d do
Lead ASIC design verification methodology across multiple projects and sites, covering block and chip level verification of high-speed IPs. Includes mentoring verification engineers, design reviews, and silicon bring-up support. Full time. Found on the employer's careers page on Oct 18, 2026. Apply through the link.
You’ll need
- Bachelor's in Electrical or Computer Engineering
- 8+ years ASIC design verification experience
- Or Master's plus 6+ years ASIC design experience
- Or PhD plus 3 years ASIC verification experience
- Verification methodology leadership across projects
Our summary of the listing. The full listing has the details.