Senior ASIC Timing Engineer

What you’d do

Lead timing analysis and closure for NVIDIA GPUs, CPUs, LPUs, and SoCs at block, cluster, and full chip level. Work with RTL, DFX, and Clocks teams on timing constraints, power convergence, and ECOs. Full time. Found on the employer's careers page on Oct 6, 2026. Apply through the link.

You’ll need

• Timing analysis and closure experience
• ASIC timing constraints and ECO implementation
• Experience with GPUs, CPUs, or SoCs
• Cross-functional collaboration with RTL and DFX teams