Physical Design Engineer - Static Timing Analysis, Annapurna Labs, Cloud Scale Machine Learning

What you’d do

Develop and maintain static timing analysis flows for block and full-chip designs, write and validate timing constraints, and run STA while advising engineers on fixing timing issues. Includes scripting to automate analysis and reporting; full-time in Austin, Texas. Found on the employer's careers page on Sep 30, 2026. Apply through the link.